Sparklabs Learning / Digital Technology
SS 2 First Term
Week 1: Review and Computer Architecture
- School
- Creative Brains Academy
- Subject
- Digital Technology
- Pack
- Teacher plans
- Prepared
- 7 November 2026
Week index
- 01Review and Computer Architecture
- 02Main Memory
- 03Secondary Storage
- 04Operating Systems, Licensing and Applications
- 05Number Systems and Data Representation
- 06Logic Gates and Digital Logic
- 07Computer Networks
- 08Internet and Online Safety
- 09Introduction to Databases
- 10Advanced Productivity Tools
- 11Revision
- 12Examination
Week 1 / First Term
Review and Computer Architecture
Monday 7 September 2026 to Friday 11 September 2026
Teacher plan
LEARNING OBJECTIVES: BY THE END OF THE LESSON STUDENTS SHOULD BE ABLE TO:
| Cognitive | i. Describe the parts of a computer system and the IPO model. ii. Explain the role of the processor in a computer. iii. Describe the system bus and the fetch-execute cycle. iv. Trace the movement of data and instructions in a cycle. |
| Affective | i. Appreciate the value of Review and Computer Architecture in school, at home and in the community. ii. Show willingness to use digital tools carefully, safely and responsibly. |
| Psychomotor | i. Draw the input, process and output model and label each stage. ii. List the three buses and state what each carries. iii. Describe the steps of the fetch-execute cycle in order. iv. Name the parts of the processor and one job of each. |
Rationale: A computer system is made up of four essential parts that must work together for the machine to be useful. Understanding review of Computer System and IPO Model, computer Architecture and the CPU, the System Bus and the Fetch-Execute Cycle helps learners use digital technology confidently, safely and responsibly.
Pre-requisite Knowledge: Learners have just entered SS 2 and already use digital devices such as phones, radios, televisions and computers at home or in the community. They can switch a device on, make a call, send a message and identify common parts such as the screen, keyboard and mouse.
Learning Material/Teaching Aid: Whiteboard, markers, computer or laptop where available, printed notes and charts on Review and Computer Architecture, practical task sheets, learners' notebooks and pens.
Reference Materials: Digital Technology for Senior Secondary Schools (SS 2); NERDC Digital Technology Curriculum; Digital Technology SS 2 First Term Notes (Week 1); First Term examination and Continuous Assessment question papers.
LESSON DEVELOPMENT
| Stage/Step (Time) | Teacher's Activities | Student's Activities | Learning Points |
|---|---|---|---|
| Introduction 5 MINUTES | Welcomes learners, explains the classroom rules and asks what digital devices they already use at home and in the community. Elicits responses, links them to the new topic and writes Review and Computer Architecture on the board. | Share what they already know about Review and Computer Architecture and listen to the introduction. | Building on everyday experience and introducing Review and Computer Architecture. |
| Step 1 8 MINUTES | Covers Review of Computer System and IPO Model: A computer system is made up of four essential parts that must work together for the machine to be useful. Hardware refers to all the physical parts, including the CPU, RAM, hard drive, keyboard and monitor. | Listen, take notes and answer oral questions on "Review of Computer System and IPO Model". | Understanding: Review of Computer System and IPO Model. |
| Step 2 8 MINUTES | Covers Computer Architecture and the CPU: Computer architecture is the design and structure of a computer's internal components and how they are organised to work together. It describes the CPU, memory, buses and the way instructions move between them. | Copy the key points, give examples from school and everyday life, and ask questions on "Computer Architecture and the CPU". | Understanding: Computer Architecture and the CPU. |
| Step 3 8 MINUTES | Covers The System Bus and the Fetch-Execute Cycle: A bus is a set of parallel wires that carries information between the CPU, memory and other devices. The data bus carries the actual data being transferred between components. The address bus carries the memory addresses that tell the CPU where data is going or coming from. | Discuss in pairs, then report one point on "The System Bus and the Fetch-Execute Cycle" to the class. | Understanding: The System Bus and the Fetch-Execute Cycle. |
| Practical Work 6 MINUTES | Guides learners through the practical work: (i) Draw the input, process and output model and label each stage. (ii) List the three buses and state what each carries. (iii) Describe the steps of the fetch-execute cycle in order. Moves round the class to check progress and correct unsafe or careless use. | Carry out the practical tasks individually or in pairs and record what they did in their notebooks. | Applying the lesson through hands-on practice. |
| Evaluation 3 MINUTES | Asks learners to: i. Describe the parts of a computer system and the IPO model. ii. Explain the role of the processor in a computer. iii. Describe the system bus and the fetch-execute cycle. iv. Trace the movement of data and instructions in a cycle. | Respond verbally and in writing to the evaluation questions. | Assessment and consolidation of the lesson content. |
| Conclusion 2 MINUTES | Recaps the main points: review of Computer System and IPO Model, computer Architecture and the CPU, the System Bus and the Fetch-Execute Cycle. Links them to the assignment and previews Week 2: Main Memory. | Listen, ask questions and copy the assignment. | Reinforcement of key concepts and a preview of the next lesson. |
Assignment: i. A learner asks what computer architecture means and why one model is taught more than any other. Define computer architecture, describe the Von Neumann architecture, and explain why the model matters. ii. During a practical class, a student is asked to trace what happens inside the CPU when it processes an instruction that adds the numbers 5 and 3. Walk through the fetch, decode, execute and store steps of the fetch-execute cycle, and state which CPU component (ALU, Control Unit, registers or buses) performs each job.